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T25S16AFEPR Scheda tecnica(PDF) 15 Page - Shenzhen Huazhimei Semiconductor Co., Ltd |
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T25S16AFEPR Scheda tecnica(HTML) 15 Page - Shenzhen Huazhimei Semiconductor Co., Ltd |
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15 / 74 page ![]() 15 5.2.4 JEDEC SFDP Basic SPI Flash Parameter Table 5.4 Basic SPI Flash Parameter, JEDEC SFDP Rev B (Sheet 1 of 5) SFDP Parameter Relative Byte Address SFDP Dword Name Data Description 30h JEDEC Basic Flash Parameter Dword-1 E5h Start of SFDP JEDEC parameter Bits 7:5 = unused = 111b Bit 4:3 = 05h is volatile status register write instruction and status register is default non-volatile= 00b Bit 2 = Program Buffer > 64 bytes = 1 Bits 1:0 = Uniform 4-kB erase is supported throughout the device = 01b 31h 20h Bits 15:8 = Uniform 4-kB erase instruction = 20h 32h F1h Bit 23 = Unused = 1b Bit 22 = Supports QOR Read (1-1-4), Yes = 1b Bit 21 = Supports QIO Read (1-4-4),Yes =1b Bit 20 = Supports DIO Read (1-2-2), Yes = 1b Bit19 = Supports DDR, No= 0 b Bit 18:17 = Number of Address Bytes 3 only = 00b Bit 16 = Supports SIO and DIO Yes = 1b Binary Field: 1-1-1-1-0-00-1 Nibble Format: 1111_0001 Hex Format: F1 33h FFh Bits 31:24 = Unused = FFh 34h JEDEC Basic Flash Parameter Dword-2 FFh Density in bits, zero based, 32 Mb = 01FFFFFFh 64 Mb = 03FFFFFFh 128 Mb = 07FFFFFFh 35h FFh 36h FFh 37h 07h 38h JEDEC Basic Flash Parameter Dword-3 44h Bits 7:5 = number of QIO (1-4-4)Mode cycles = 010b Bits 4:0 = number of Fast Read QIO Dummy cycles = 00100b for default latency code 39h EBh Fast Read QIO (1-4-4)instruction code 3Ah 08h Bits 23:21 = number of Quad Out (1-1-4) Mode cycles = 000b Bits 20:16 = number of Quad Out Dummy cycles = 01000b for default latency code 3Bh 6Bh Quad Out (1-1-4)instruction code 3Ch JEDEC Basic Flash Parameter Dword-4 08h Bits 7:5 = number of Dual Out (1-1-2)Mode cycles = 000b Bits 4:0 = number of Dual Out Dummy cycles = 01000b for default latency code 3Dh 3Bh Dual Out (1-1-2) instruction code 3Eh 80h Bits 23:21 = number of Dual I/O Mode cycles = 100b Bits 20:16 = number of Dual I/O Dummy cycles = 00000b for default latency code 3Fh BBh Dual I/O instruction code 40h JEDEC Basic Flash Parameter Dword-5 FEh Bits 7:5 RFU = 111b Bit 4 = QPI (4-4-4) fast read commands supported = 1b Bits 3:1 RFU = 111b Bit 0 = Dual All not supported = 0b 41h FFh Bits 15:8 = RFU = FFh 42h FFh Bits 23:16 = RFU = FFh 43h FFh Bits 31:24 = RFU = FFh 44h JEDEC Basic Flash Parameter Dword-6 FFh Bits 7:0 = RFU = FFh 45h FFh Bits 15:8 = RFU = FFh 46h FFh Bits 23:21 = number of Dual All Mode cycles = 111b Bits 20:16 = number of Dual All Dummy cycles = 11111b 47h FFh Dual All instruction code HM25Q128A |
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