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PIMXRT406LCAF4A Scheda tecnica(PDF) 32 Page - NXP Semiconductors

Il numero della parte PIMXRT406LCAF4A
Spiegazioni elettronici  i.MX RT1020 Crossover Processors for Industrial Products
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

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i.MX RT1020 Crossover Processors for Industrial Products, Rev. 2, 03/2021
32
NXP Semiconductors
Electrical characteristics
4.3.2
I/O AC parameters
This section includes the AC parameters of the following I/O types:
•
General Purpose I/O (GPIO)
Figure 4 shows load circuit for output, and Figure 5 show the output transition time waveform.
Figure 4. Load circuit for output
Figure 5. Output transition time waveform
4.3.2.1
General purpose I/O AC parameters
The I/O AC parameters for GPIO in slow and fast modes are presented in the Table 23 and Table 24,
respectively. Note that the fast or slow I/O behavior is determined by the appropriate control bits in the
IOMUXC control registers.
Input current (no PU/PD)
IIN
VI = 0, VI = NVCC_XXXX
-1
1
A
Keeper Circuit Resistance
R_Keeper
VI =0.3 x NVCC_XXXX, VI = 0.7
x NVCC_XXXX
105
175
k
1 Overshoot and undershoot conditions (transitions above NVCC_XXXX and below GND) on switching pads must be held
below 0.6 V, and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/
undershoot must be controlled through printed circuit board layout, transmission line impedance matching, signal line
termination, or other methods. Non-compliance to this specification may affect device reliability or cause permanent damage
to the device.
2 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, Vil or Vih. Monotonic input transition time is from 0.1 ns to 1 s.
3 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
Table 22. Single voltage GPIO DC parameters (continued)
Parameter
Symbol
Test Conditions
Min
Max
Units
Test Point
From Output
Under Test
CL
CL includes package, probe and fixture capacitance
0V
OVDD
20%
80%
80%
20%
tr
tf
Output (at pad)



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