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PIMXRT406LCAF4A Scheda tecnica(PDF) 8 Page - NXP Semiconductors |
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PIMXRT406LCAF4A Scheda tecnica(HTML) 8 Page - NXP Semiconductors |
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8 / 100 page ![]() i.MX RT1020 Crossover Processors for Industrial Products, Rev. 2, 03/2021 8 NXP Semiconductors Architectural overview 2 Architectural overview The following subsections provide an architectural overview of the i.MX RT1020 processor system. 2.1 Block diagram Figure 2 shows the functional modules in the i.MX RT1020 processor system1. . Figure 2. i.MX RT1020 system block diagram 1. Some modules shown in this block diagram are not offered on all derivatives. See Table 2 for details. Internal Memory 256 KB OCRAM shared with TCM 96 KB ROM External Memory Connectivity eMMC 4.5 / SD 3.0 x2 8 x 8 Keypad Security I2C x4 UART x8 S/PDIF Tx / Rx GPIO SPI x4 ADC System Control Secure JTAG PLL / OSC RTC and Reset Enhanced DMA IOMUX GP Timer x6 CPU Platform ARM Cortex-M7 16 KB I-cache 16 KB D-cache FPU FlexSPI (dual-Channel QuadSPI NAND and NOR, Octal Flash, and RAM) External Memory Controller 8/16 bit SDRAM Parallel NOR Flash NAND Flash PSRAM MPU NVIC Up to 256 KB TCM FlexCAN x2 USB2.0 OTG with PHY 10 / 100 ENET with IEEE 1588 x1 ADC x2 ACMP x4 Ciphers HAB Quadrature ENC x2 QuadTimer FlexPWM Watch Dog x4 Power Management DCDC LDO Temp Monitor I2S / SAI x3 (4-Channel) x2 (12-Channel) x2 Secure RTC eFuse RNG |
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