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PIMXRT406LCAF4A Scheda tecnica(PDF) 71 Page - NXP Semiconductors |
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PIMXRT406LCAF4A Scheda tecnica(HTML) 71 Page - NXP Semiconductors |
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71 / 100 page ![]() Electrical characteristics i.MX RT1020 Crossover Processors for Industrial Products, Rev. 2, 03/2021 NXP Semiconductors 71 Figure 47 shows RMII mode timings. Table 64 describes the timing parameters (M16–M21) shown in the figure. Figure 47. RMII mode signal timing diagram 4.8.5 Flexible Controller Area Network (FLEXCAN) AC electrical specifications Please refer to Section 4.3.2.1, General purpose I/O AC parameters. 4.8.6 LPUART electrical specifications Please refer to Section 4.3.2.1, General purpose I/O AC parameters. Table 64. RMII signal timing ID Characteristic Min. Max. Unit M16 ENET_CLK pulse width high 35% 65% ENET_CLK period M17 ENET_CLK pulse width low 35% 65% ENET_CLK period M18 ENET_CLK to ENET0_TXD[1:0], ENET_TX_DATA invalid 4 — ns M19 ENET_CLK to ENET0_TXD[1:0], ENET_TX_DATA valid — 13 ns M20 ENET_RX_DATAD[1:0], ENET_RX_EN(ENET_RX_EN), ENET_RX_ER to ENET_CLK setup 2— ns M21 ENET_CLK to ENET_RX_DATAD[1:0], ENET_RX_EN, ENET_RX_ER hold 2— ns ENET_CLK (input) ENET_TX_EN M16 M17 M18 M19 M20 M21 ENET_RX_DATA[1:0] ENET_TX_DATA (output) ENET_RX_ER ENET_RX_EN (input) |
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