PIMXRT406LCAF4A datasheet(78/100 Pages) NXP

78 / 100 page

i.MX RT1020 Crossover Processors for Industrial Products, Rev. 2, 03/2021

NXP Semiconductors

Boot mode configuration

GPIO_SD_B1_00

usdhc2.DATA2

ALT 0

—

GPIO_SD_B1_01

usdhc2.DATA3

ALT 0

—

GPIO_SD_B1_08

usdhc2.DATA4

ALT 0

—

GPIO_SD_B1_09

usdhc2.DATA5

ALT 0

—

GPIO_SD_B1_10

usdhc2.DATA6

ALT 0

—

GPIO_SD_B1_11

usdhc2.DATA7

ALT 0

—

Table 75. Boot through SPI-1

PAD Name

IO Function

Mux Mode

Comments

GPIO_AD_B0_10

lpspi1.SCK

ALT 1

—

GPIO_AD_B0_11

lpspi1.PCS0

ALT 1

—

GPIO_AD_B0_12

lpspi1.SDO

ALT 1

—

GPIO_AD_B0_13

lpspi1.SDI

ALT 1

—

Table 76. Boot through SPI-2

PAD Name

IO Function

Mux Mode

Comments

GPIO_SD_B1_07

lpspi2.SCK

ALT 4

—

GPIO_SD_B1_08

lpspi2.SDO

ALT 4

—

GPIO_SD_B1_09

lpspi2.SDI

ALT 4

—

GPIO_SD_B1_06

lpspi2.PCS0

ALT 4

—

Table 77. Boot through SPI-3

PAD Name

IO Function

Mux Mode

Comments

GPIO_AD_B1_12

lpspi3.SCK

ALT 2

—

GPIO_AD_B1_13

lpspi3.PCS0

ALT 2

—

GPIO_AD_B1_14

lpspi3.SDO

ALT 2

—

GPIO_AD_B1_15

lpspi3.SDI

ALT 2

—

Table 78. Boot through SPI-4

PAD Name

IO Function

Mux Mode

Comments

GPIO_EMC_32

lpspi4.SCK

ALT 4

—

GPIO_EMC_33

lpspi4.PCS0

ALT 4

—

Table 74. Boot through SD2 (continued)

PAD Name

IO Function

Mux Mode

Comments

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