ADL6317ACCZ-R7 datasheet(28/38 Pages) AD

28 / 38 page

ADL6317

Data Sheet

Rev. B | Page 28 of 38

Address: 0x013, Reset: 0x00, Name: SPARE_013

Spare Register 0x013

[7:0] SPARE_013 (R)

Table 32. Bit Descriptions for SPARE_013

Bits

Bit Name

Description

Reset

Access

[7:0]

SPARE_013

Spare Register 0x013

0x0

Address: 0x100, Reset: 0x40, Name: SIG_PATH0_0

DAC Enable

Auxiliary Mux Bandgap Enable

VVA Enable

ADC Enable

DSA Enable

Enable Bias Generator

[7] DAC_EN (R/W)

[1:0] RESERVED

[6] AMUX_BG_EN (R/W)

[2] VVA_EN (R/W)

[5] ADC_EN (R/W)

[3] DSA_EN (R/W)

[4] EN_IBIASGEN (R/W)

Table 33. Bit Descriptions for SIG_PATH0_0

Bits

Bit Name

Description

Reset

Access

DAC_EN

DAC Enable.

0x0

R/W

0: Disable DAC.

1: Enable DAC.

AMUX_BG_EN

Auxiliary Mux Band Gap Enable.

0x1

R/W

0: Disable auxiliary mux band gap.

1: Enable auxiliary mux band gap.

ADC_EN

ADC Enable.

0x0

R/W

0: Disable ADC.

1: Enable ADC.

EN_IBIASGEN

Enable Bias Generator.

0x0

R/W

0: Disable bias generator.

1: Enable bias generator.

DSA_EN

DSA Enable.

0x0

R/W

0: Disable DSA.

1: Enable DSA.

VVA_EN

VVA Enable.

0x0

R/W

0: Disable VVA.

1: Enable VVA.

[1:0]

RESERVED

Reserved.

0x0

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