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ADSP-SC596 Scheda tecnica(PDF) 73 Page - Analog Devices |
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ADSP-SC596 Scheda tecnica(HTML) 73 Page - Analog Devices |
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73 / 134 page ![]() Rev. PrD | Page 73 of 134 | May 2022 ADSP-SC595/SC596/SC598 Preliminary Technical Data Table 40. LPs—Transmit1 All specifications are based on simulation data and are subject to change without notice. Parameter Min Max Unit Timing Requirements tSLACH LPx_ACK Setup Before LPx_CLK Low 2 × tCDU_CLKO8 + 13.5 ns tHLACH LPx_ACK Hold After LPx_CLK Low –2.5 ns Switching Characteristics tDLDCH Data Delay After LPx_CLK High 2.23 ns tHLDCH Data Hold After LPx_CLK High –1.04 ns tLCLKTWL 2 LPx_CLK Width Low 0.4 × tLCLKTPROG 0.63 × tLCLKTPROG ns tLCLKTWH 2 LPx_CLK Width High 0.45 × tLCLKTPROG 0.63 × tLCLKTPROG ns tLCLKTW 2 LPx_CLK Period N × tLCLKTPROG – 0.8 ns tDLACLK LPx_CLK Low Delay After LPx_ACK High tCDU_CLKO8 + 4 2 × tCDU_CLKO8 + 1 × tCDU_CLKO8 + 10 ns 1 Specifications apply to LP0 and LP1. 2 See Table 22 for details on the minimum period that can be programmed for fLCLKTPROG. Figure 11. LPs—Transmit LPx_CLK LPx_Dx (DATA) LPx_ACK (IN) OUT tDLDCH tHLDCH tSLACH tHLACH tDLACLK tLCLKTWH tLCLKTWL LAST BYTE TRANSMITTED FIRST BYTE TRANSMITTED 1 NOTES The t SLACH and tHLACH specifications apply only to the LPx_CLK falling edge. If these specifications are met, LPx_CLK extends and the dotted LPx_CLK falling edge does not occur as shown. The position of the dotted falling edge can be calculated using the t LCLKTWH specification. t LCLKTWH Min must be used for tSLACH and t LCLKTWH Max for tHLACH. |
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