Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

CC1010-RTY1 Scheda tecnica(PDF) 63 Page - Texas Instruments

Click here to check the latest version.
Il numero della parte CC1010-RTY1
Spiegazioni elettronici  Single Chip Very Low Power RF Transceiver with 8051-Compatible Microcontroller
PDF  152 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

CC1010-RTY1 Scheda tecnica(HTML) 63 Page - Texas Instruments

Back Button CC1010-RTY1 Datasheet HTML 59Page - Texas Instruments CC1010-RTY1 Datasheet HTML 60Page - Texas Instruments CC1010-RTY1 Datasheet HTML 61Page - Texas Instruments CC1010-RTY1 Datasheet HTML 62Page - Texas Instruments CC1010-RTY1 Datasheet HTML 63Page - Texas Instruments CC1010-RTY1 Datasheet HTML 64Page - Texas Instruments CC1010-RTY1 Datasheet HTML 65Page - Texas Instruments CC1010-RTY1 Datasheet HTML 66Page - Texas Instruments CC1010-RTY1 Datasheet HTML 67Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 63 / 152 page
background image
CC1010
SWRS047
Page 63 of 152
16.5 Watchdog Timer
CC1010 includes an 8-bit watchdog timer
that is clocked by the system clock. The
clock is divided by a number in the range
from 2048 to 16384, controllable through
WDT.WDTPRE(1:0). The divided clock
controls an 8-bit timer, which generates
system reset upon overflow. A block
diagram for the Watchdog Timer is shown
in Figure 14.
Chipcon recommends that the watchdog
timer should be disabled when the
CC1010
is clocked from the 32 kHz oscillator
(Clock mode 1).
Note that the watchdog timer is not active
in Power-down mode, and therefore
cannot wake up the
CC1010 from Power-
Down mode.
WDT (0xD2) - Watchdog Timer Control Register
Bit
Name
R/W
Reset value
Description
7
-
R0
0
Reserved, read as 0
6
-
R0
0
Reserved, read as 0
5
-
R0
0
Reserved, read as 0
4
WDTSE
R/W
0
Watchdog Timer Stop Enable, used to disable the
watchdog timer
3
WDTEN
R/W
1
Watchdog Timer Enable / Disable
0 : The watchdog timer is disabled
1 : The watchdog timer is enabled
The watchdog timer is enabled after reset. To disable the
watchdog timer,
WDTSE must be used as described in this
section.
2
WDTCLR
R0/
W
0
Watchdog timer clear signal.
WDTCLR must periodically
be set to prevent the watchdog timer from resetting the
system.
WDTCLR is cleared by hardware, and is thus
always read 0.
0 : Normal watchdog operation
1 : Watchdog timer is cleared.
1:0
WDTPRE.1
R/W
11
Watchdog timer prescaler control.
WDTPRE(1:0)
controls the division of the main crystal oscillator clock to
generate the watchdog timer clock.
00 : fWDT = fXOSC / 2048
01 : fWDT = fXOSC / 4096
10 : fWDT = fXOSC / 8192
11 : fWDT = fXOSC / 16384



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com