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TDA4VEN...Q1 Scheda tecnica(PDF) 164 Page - Texas Instruments

Il numero della parte TDA4VEN...Q1
Spiegazioni elettronici  TDA4VEN, TDA4AEN Jacinto™ Processors
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6.9.5.15 MCAN
Table 6-71 and Table 6-72 presents timing conditions and switching characteristics for MCAN.
For more details about features and additional description information on the device Controller Area Network
Interface, see the corresponding subsections within Signal Descriptions and Detailed Description sections.
Note
The device has multiple MCAN modules. MCANn is a generic prefix applied to MCAN signal names,
where n represents the specific MCAN module.
Table 6-71. MCAN Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
2
15
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
5
20
pF
Table 6-72. MCAN Switching Characteristics
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
MCAN1
td(MCAN_TX)
Delay time, transmit shift register to MCANn_TX
10
ns
MCAN2
td(MCAN_RX)
Delay time, MCANn_RX to receive shift register
10
ns
For more information, see Controller Area Network (MCAN) section in Peripherals chapter in the device TRM.
TDA4VEN-Q1, TDA4AEN-Q1
SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024
www.ti.com
164
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