HYB18T512400B datasheet(33/68 Pages) QIMONDA

33 / 68 page

Internet Data Sheet

Rev. 1.1, 2007-05

03292006-YBYM-WG0Z

HYB18T512[40/80/16]0B[C/F]

512-Mbit Double-Data-Rate-Two SDRAM

5.5

Input / Output Capacitance

This chapter contains the input / output capacitance.

TABLE 34

Input / Output Capacitance for DDR2-800

TABLE 35

Input / Output Capacitance for DDR2-667

Symbol

Parameter

DDR2-800

Min.

Max.

Unit

CCK

Input capacitance, CK and CK

1.0

2.0

CDCK

Input capacitance delta, CK and CK

—0.25

Input capacitance, all other input-only pins

1.0

1.75

CDI

Input capacitance delta, all other input-only pins

—

0.25

CIO

Input/output capacitance,

DQ, DM, DQS, DQS, RDQS, RDQS

2.5

3.5

CDIO

Input/output capacitance delta,

DQ, DM, DQS, DQS, RDQS, RDQS

—0.5

Symbol

Parameter

DDR2-667

Min.

Max.

Unit

CCK

Input capacitance, CK and CK

1.0

2.0

CDCK

Input capacitance delta, CK and CK

—0.25

Input capacitance, all other input-only pins

1.0

2.0

CDI

Input capacitance delta, all other input-only pins

—

0.25

CIO

Input/output capacitance,

DQ, DM, DQS, DQS, RDQS, RDQS

2.5

3.5

CDIO

Input/output capacitance delta,

DQ, DM, DQS, DQS, RDQS, RDQS

—0.5

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