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SPSB100 Scheda tecnica(PDF) 176 Page - STMicroelectronics |
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SPSB100 Scheda tecnica(HTML) 176 Page - STMicroelectronics |
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176 / 213 page ![]() Table 251. DSR7 (0x27) LSB description Bit Name Description 7 POWUP_RETRY_CNT_0 6 RES 5 NVM_PROG_OK U-NVM programming is completed without error 4 NVM_PROG_DONE U-NVM programming is completed 3 CRC 3 2 CRC 2 1 CRC 1 0 CRC 0 Table 252. DSR8 (0x28) MSB Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16 - (R0) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) RES FCCU_LAST_STABLE_12 FCCU_LAST_STABLE_11 FCCU_LAST_STABLE_10 FCCU_LAST_STABLE_9 FCCU_LAST_STABLE_8 FCCU_LAST_STABLE_7 FCCU_LAST_STABLE_6 Reserved FCCU last stable bit 12 FCCU last stable bit 11 FCCU last stable bit 10 FCCU last stable bit 9 FCCU last stable bit 8 FCCU last stable bit 7 FCCU last stable bit 6 Table 253. DSR8 (0x28) MSB description Bit Name Description 23 RES Reserved 22 FCCU_LAST_STABLE_12 21 FCCU_LAST_STABLE_11 20 FCCU_LAST_STABLE_10 19 FCCU_LAST_STABLE_9 18 FCCU_LAST_STABLE_8 17 FCCU_LAST_STABLE_7 16 FCCU_LAST_STABLE_6 Table 254. DSR8 (0x28) Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) FCCU_LAST_STABLE_5 FCCU_LAST_STABLE_4 FCCU_LAST_STABLE_3 FCCU_LAST_STABLE_2 FCCU_LAST_STABLE_1 FCCU_LAST_STABLE_0 FORCED_SLEEP_REGFAIL REG_FAIL_CNT_1 FCCU last stable bit 5 FCCU last stable bit 4 FCCU last stable bit 3 FCCU last stable bit 2 FCCU last stable bit 1 FCCU last stable bit 0 Forced sleep regulator fail bit Regulator fail counter bit 1 Table 255. DSR8 (0x28) description Bit Name Description 15 FCCU_LAST_STABLE_5 14 FCCU_LAST_STABLE_4 13 FCCU_LAST_STABLE_3 12 FCCU_LAST_STABLE_2 11 FCCU_LAST_STABLE_1 10 FCCU_LAST_STABLE_0 FCCU monitor last stable value duration 9 FORCED_SLEEP_REGFAIL 1: When REG_FAIL_CNT = 3 then FSM transit from REC_2 to DEEP-SLEEP (similar to TSD_CNT_FAIL) and in DEEP-SLEEP SPSB100 SPI registers DS14640 - Rev 2 page 176/213 |
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