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SPSB100 Scheda tecnica(PDF) 177 Page - STMicroelectronics |
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SPSB100 Scheda tecnica(HTML) 177 Page - STMicroelectronics |
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177 / 213 page ![]() Bit Name Description 0: No transition to DEEP-SLEEP due to REG_FAIL_CNT 8 REG_FAIL_CNT_1 Table 256. DSR8 (0x28) LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 (R) 0 (R) 0 (RC1L) 0 (RC1L) 0 (RC1L) 0 (RC1L) 0 (RC1L) 0 (RC1L) REG_FAIL_CNT_0 ABIST_BOOST_IGNORED LBIST_COMPLETE ABIST_COMPLETE CRC3 CRC2 CRC1 CRC0 Regulator fail counter bit 0 ABIST boost ignored bit Cyclic redundancy checking bit 3 Cyclic redundancy checking bit 2 Cyclic redundancy checking bit 1 Cyclic redundancy checking bit 0 Table 257. DSR8 (0x28) LSB description Bit Name Description 7 REG_FAIL_CNT_0 REG_FAIL_CNT is incremented when a reg_fail event occurs on any regulator having its REGFAIL_GO_REC = 1 (that is one counter for all regulators having REGFAIL_GO_REC = 1) 6 ABIST_BOOST_IGNORED 1: Boost PWM activity has been detected during the ABIST test. So the BOOST comparator has not been covered by ABIST not to signal a wrong ABIST error 0: Boost ABIST well run 5 LBIST_COMPLETE Define logical BIST ending 1: LBIST is complete 0: LBIST not complete or not running 4 ABIST_COMPLETE Define analog BIST ending 1: ABIST is complete 0: ABIST not complete or not running 3 CRC 3 2 CRC 2 1 CRC 1 0 CRC 0 Table 258. DSR9 (0x29) MSB Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16 - (R0) - (R0) - (R0) - (R0) - (R0) - (R0) - (R0) - (R0) RES RES RES RES RES RES RES RES Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Table 259. DSR9 (0x29) MSB description Bit Name Description 23 RES Reserved 22 RES Reserved 21 RES Reserved 20 RES Reserved 19 RES Reserved 18 RES Reserved SPSB100 SPI registers DS14640 - Rev 2 page 177/213 |
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