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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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DAC39RFS10 Scheda tecnica(PDF) 76 Page - Texas Instruments |
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DAC39RFS10 Scheda tecnica(HTML) 76 Page - Texas Instruments |
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76 / 177 page  Table 7-22. JESD Interface Modes JMODE Encoding Max Input Sample Rate per Stream (MSPS)#n one# MAX Serdes Baud Rate (Gbps) R = FBIT/ FCLK N Mx = Max # Streams Ls = Lanes/ Stream Lx = Max # Lanes LT = Interpolation JESD Format KR MIN MAX F S HD SI 4 8b/10b 640 12.8 20/LT 16 2 1 2 4 64 2 1 0 1 32, 64, 128 64b/66b 775.8 12.8 16.5/LT 5 8b/10b 320 12.8 40/LT 16 4 ½ 2 8 128 4 1 0 1 16,32,64 64b/66b 387.9 12.8 33/LT 6 8b/10b 160 12.8 80/LT 16 8 ¼ 2 16 256 8 1 0 1 8,16,32 64b/66b 193.9 12.8 66/LT 7 8b/10b 80 12.8 160/LT 16 8 ⅛ 1 32 256 16 1 0 1 4,8,16 64b/66b 97.0 12.8 132/LT 7.4.2.2 JESD204C Format Diagrams The following sub-sections depict each output format, showing how samples and tail bits are mapped to the lanes. Any lanes that are not shown in the output format tables are unused. Each table depicts exactly one frame. Tail bits are discarded and ignored by the transport layer. All diagrams are with respect to the logical lane numbers which can be arbitrarily mapped to the external physical lanes using LANE_SELn. Table 7-23. Format Notation Description Notation Description T Tail bits (used for some 12-bit modes) CH0_I[n] In-Phase samples for channel 0. Can also be considered as “channel A” when the input isn’t considered to be complex data. CH0_Q[n] Quadrature samples for channel 0. Can also be considered as “channel B” when the input isn’t considered to be complex data. CH1_I[n] In-Phase samples for channel 1. CH1_Q[n] Quadrature samples for channel 1. CH2_I[n] In-Phase samples for channel 2. CH2_Q[n] Quadrature samples for channel 2. CH3_I[n] In-Phase samples for channel 3. CH3_Q[n] Quadrature samples for channel 3. In all of the above notations, n indicates the sample number. Some JESD204C modes have S=1 (one sample per stream per frame). In those cases, “[n]” is omitted in the descriptions. 7.4.2.2.1 16-bit Formats Table 7-24. JMODE 4 (16-bit, 1 lane per stream, 8 streams maximum) Octet 0 1 Nibble 0 1 2 3 Lane 0 CH0_I Lane 1 CH0_Q Table 7-25. JMODE 5 (16-bit, 1/2 lane per stream, 8 streams maximum) Octet 0 1 2 3 Nibble 0 1 2 3 4 5 6 7 Lane 0 CH0_I CH0_Q Lane 1 CH1_I CH1_Q DDS39RF12, DDS39RFS12 SBASB21 – SEPTEMBER 2024 www.ti.com 76 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DDS39RF12 DDS39RFS12 |
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