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LMKDB1104FS85 Scheda tecnica(PDF) 8 Page - Texas Instruments |
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LMKDB1104FS85 Scheda tecnica(HTML) 8 Page - Texas Instruments |
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8 / 69 page ![]() Table 5-2. LMKDB1204 Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME(2) (3) NO. CLOCK OUTPUTS CLK0_P 23 O LP-HCSL differential clock output 0. No connect if unused. CLK0_N 24 O CLK1_P 20 O LP-HCSL differential clock output 1. No connect if unused. CLK1_N 21 O CLK2_P 13 O LP-HCSL differential clock output 2. No connect if unused. CLK2_N 14 O CLK3_P 10 O LP-HCSL differential clock output 0. No connect if unused. CLK3_N 11 O POWER VDDA 18 P Analog power supply. Additional power supply filtering is recommended. See Section 10.3 for details. VDD_IN0 4 P Power supply for CLKIN0 VDD_IN1 7 P Power supply for CLKIN1 VDD_DIG 26 P Power supply for digital VDDO_BANK1 12 P Power supply for output bank 1 (OUT4 to OUT7). VDDO_BANK0 22 P Power supply for output bank 0 (OUT0 to OUT3). GND 27 G Device Ground. Thermal Pad (GND) Pad G Device Ground, Thermal pad. LOGIC CONTROLS / STATUS ^OE0# 25 I Active low input to control CLK0. Internal pullup resistor. 0 = Output Active, 1 = Output Inactive ^OE1# 19 I Active low input to control CLK1. Internal pullup resistor. 0 = Output Active, 1 = Output Inactive ^OE2# 16 I Active low input to control CLK2. Internal pullup resistor. 0 = Output Active, 1 = Output Inactive ^OE3#/SMB_CLK 9 I Output Enable for CLK3 Active Low/SMBus Clock. Internal pullup resistor. Functionality is decided by the state of pin 15 (SMB_EN) at power-up. When used as SMBus Clock pin, external pullup resistor is required. No connect if unused. ^vCLKIN_SEL_tri/ SMB_DATA 8 I 3-Level Clock Input Select/SMBus Data. Internal pullup and pulldown resistor. Functionality is decided by the state of pin 15 (SMB_EN) at power-up. When used as CLKIN_SEL_tri pin: Low = CLKIN0 goes to all outputs Mid = CLKIN0 goes to Bank 0, CLKIN1 goes to Bank 1 High = CLKIN1 goes to all outputs When used as SMBus Data pin, external pullup resistor is required. vPWRGD/PWRDN# 1 I Power Good/Power Down Active Low. Multifunctional input pin. Internal pulldown resistor. On the first low-to-high transition, functions as Power Good pin which starts up the device On the subsequent low/high transitions, functions as Power Down Active Low pin which controls the device to enter or exit power-down mode. Low = power-down mode High = normal operation mode vSMB_EN 15 I SMBus Enable. Internal pulldown resistor. Do not change the state of this pin after power- up. Low at power-up = SMBus disabled. Pin 8 is CLKIN_SEL_tri and Pin 9 is OE3#. High at power-up = SMBus enabled. Pin 8 is SMB_DATA and Pin 9 is SMB_CLK. LMKDB1202, LMKDB1204, LMKDB1208 SNAS927A – AUGUST 2025 – REVISED APRIL 2026 www.ti.com 8 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: LMKDB1202 LMKDB1204 LMKDB1208 |
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