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H8S/2218 Scheda tecnica(PDF) 336 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 336 Page - Renesas Technology Corp |
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336 / 750 page ![]() Section 9 16-Bit Timer Pulse Unit (TPU) Rev.6.00 Jun. 03, 2008 Page 288 of 698 REJ09B0074-0600 Table 9.12 TIORL_0 (channel 0) Description Bit 3 Bit 2 Bit 1 Bit 1 IOC3 IOC2 IOC1 IOC0 TGRC_0 Function TIOCC0 Pin Function 0 Output disabled 0 1 Initial output is 0 output 0 output at compare match 0 Initial output is 0 output 1 output at compare match 0 1 1 Initial output is 0 output Toggle output at compare match 0 Output disabled 0 1 Initial output is 1 output 0 output at compare match 0 Initial output is 1 output 1 output at compare match 0 1 1 1 Output compare register* Initial output is 1 output Toggle output at compare match 1 0 Input capture register* Capture input source is TIOCC0 pin Input capture at rising edge 0 1 Capture input source is TIOCC0 pin Input capture at falling edge 0 1 × Capture input source is TIOCC0 pin Input capture at both edges 1 × × Setting prohibited Legend: ×: Don’t care Note: * When the BFA bit in TMDR_0 is set to 1and TGRC_0 is used as a buffer register, this setting is invalid and input capture/output compare is not generated. |
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