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H8S/2218 Scheda tecnica(PDF) 93 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 93 Page - Renesas Technology Corp |
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93 / 750 page ![]() Section 2 CPU Rev.6.00 Jun. 03, 2008 Page 45 of 698 REJ09B0074-0600 2.5.2 Memory Data Formats Figure 2.10 shows the data formats in memory. The H8S/2000 CPU can access word data and longword data in memory, but word or longword data must begin at an even address. If an attempt is made to access word or longword data at an odd address, no address error occurs but the least significant bit of the address is regarded as 0, so the access starts at the preceding address. This also applies to instruction fetches. When SP (ER7) is used as an address register to access the stack, the operand size should be word size or longword size. 70 76 543210 MSB LSB MSB MSB LSB LSB Data Type Address 1-bit data Byte data Word data Address L Address L Address 2M Address 2M+1 Longword data Address 2N Address 2N+1 Address 2N+2 Address 2N+3 Data Image Figure 2.10 Memory Data Formats 2.6 Instruction Set The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function in table 2.1. |
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