H8SSLASH2218 datasheet(84/750 Pages) RENESAS

Il numero della parte	H8S/2218

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	750 Pages

Scroll/Zoom	100%

Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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84 / 750 page

Section 2 CPU

Rev.6.00 Jun. 03, 2008 Page 36 of 698

REJ09B0074-0600

2.2.2

Advanced Mode

• Address Space

Linear access is provided to a 16-Mbyte maximum address space.

• Extended Registers (En)

The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit

segments of 32-bit registers or address registers.

• Instruction Set

All instructions and addressing modes can be used.

• Exception Vector Table and Memory Indirect Branch Addresses

In advanced mode the top area starting at H'00000000 is allocated to the exception vector table

in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a branch address is stored in

the lower 24 bits (figure 2.3). For details of the exception vector table, see section 4, Exception

Handling.

H'00000000

H'00000003

H'00000004

H'0000000B

H'0000000C

H'00000010

H'00000008

H'00000007

Reserved

Reset exception vector

(Reserved for system use)

Exception vector table

Exception vector 1

(Reserved for system use)

Figure 2.3 Exception Vector Table (Advanced Mode)

H8S/2218 Scheda tecnica(PDF) 84 Page - Renesas Technology Corp