H8SSLASH2218 datasheet(70/750 Pages) RENESAS

70 / 750 page

Section 1 Overview

Rev.6.00 Jun. 03, 2008 Page 22 of 698

REJ09B0074-0600

Pin No.

Type

Symbol

TFP-100G,

TFP-100GV

BP-112,

BP-112V

FP-64E,

FP-64EV,

TNP-64B,

TNP-64BV

I/O

Function

RES*

Input

Reset pin. When this pin is driven

low, the chip is reset.

STBY*

H11

Input

When this pin is driven low, a

transition is made to hardware

standby mode.

MRES

⎯

Input

When this pin is driven low, a

transition is made to manual reset

mode. (Supported only by the

H8S/2218 Group)

BREQ

⎯

Input

Used by an external bus master to

issue a bus request to this LSI

(Supported only by the H8S/2218

Group)

BACK

⎯

Output

Indicates that the bus has been

released to an external bus master.

(Supported only by the H8S/2218

Group)

FWE

Input

Pin for use by flash memory. This

pin is only used in the flash memory

version. In the masked ROM

version, it should be connected to

the system power supply (0 V).

System

control

EMLE

Input

Emulator enable

When E10A is not used, connect

this pin to the system power supply

(0 V). When E10A is used, this pin

should be fixed high.

Interrupts

NMI*

Input

Nonmaskable interrupt pin. If this

pin is not used, it should be fixed

high.

IRQ7

IRQ4

IRQ3

IRQ2

IRQ1

IRQ0

Input

These pins request a maskable

interrupt.

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