H8SSLASH2218 datasheet(524/750 Pages) RENESAS

Il numero della parte	H8S/2218

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	750 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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524 / 750 page

Section 14 Universal Serial Bus (USB)

Rev.6.00 Jun. 03, 2008 Page 476 of 698

REJ09B0074-0600

14.3.6

USB Endpoint Stall Register 0 (UESTL0)

UESTL0 is used to forcibly stall each endpoint EP0 to EP3. When the bit is set to 1, the

corresponding endpoint returns a stall handshake to the host, following from the next transfer.

The stall bit for endpoint 0 is cleared automatically on reception of 8-byte command data for

which decoding is performed by the function, and thus the EP0STL bit is cleared to 0. When the

SetupTS flag in UIFR0 is set to 1, a write of 1 to the EP0STL bit is ignored. For details, refer to

section 14.5.9, Stall Operations.

Bit

Bit Name

Initial Value

R/W

Description

7, 6

—

All 0

Reserved

These bits are always read as 0 and cannot be

modified.

EP2STL

R/W

EP2 Stall

0: Cancels the EP2 stall state.

1: Sets the EP2 stall state.

EP1STL

R/W

EP1 Stall

0: Cancels the EP1 stall state.

1: Sets the EP1 stall state.

EP3STL

R/W

EP3 Stall

0: Cancels the EP3 stall state.

1: Sets the EP3 stall state.

2, 1

—

All 0

Reserved

These bits are always read as 0 and cannot be

modified.

EP0STL

R/W

EP0 Stall

0: Cancels the EP0 stall state.

1: Sets the EP0 stall state.

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