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H8S/2218 Scheda tecnica(PDF) 540 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 540 Page - Renesas Technology Corp |
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540 / 750 page ![]() Section 14 Universal Serial Bus (USB) Rev.6.00 Jun. 03, 2008 Page 492 of 698 REJ09B0074-0600 14.3.29 USB Test Registers 2 and A to F (UTSTR2, UTSTRA to UTSTRF) UTSTR2 and UTSRTA to UTSRTF are test registers and cannot be written to. 14.3.30 Module Stop Control Register B (MSTPCRB) Bit Bit Name Initial Value R/W Description 7 6 5 4 3 2 1 MSTPB7 MSTPB6 MSTPB5 MSTPB4 MSTPB3 MSTPB2 MSTPB1 1 1 1 1 1 1 1 R/W Module Stop For details, refer to section 20.1.3, Module Stop Control Registers A to C (MSTPCRA to MSTPCRC). 0 MSTPB0 1 R/W USB Module Stop 2 0: Cancels the stop state of the USB module completely. A clock is provided for the USB module completely. Before clearing this bit, make sure to clear the USBSTOP1 bit in EXMDLSTP. After this bit has been cleared, the internal PLL circuit starts operation. Registers in the USB module must be accessed after the USB operating clock stabilization time (the CK48READY bit in UIFR3 is set to 1) has passed. 1: Places the USB module partly in the stop state. The internal PLL circuit and the most of the clocks in the USB module stop operation. However, register values in the USB module are maintained. |
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