H8SSLASH2218 datasheet(581/750 Pages) RENESAS

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Section 14 Universal Serial Bus (USB)

Rev.6.00 Jun. 03, 2008 Page 533 of 698

REJ09B0074-0600

14.8.14

Pin Processing when USB Not Used

Pin processing should be performed as follows.

DrVCC = VCC, DrVSS = 0 V, USD

+ = USD− = USPND = open state, VBUS = UBPM = 0 V

14.8.15

Notes on TR Interrupt

Note the following when using the transfer request interrupt (TR interrupt) for IN transfer to EP0i,

EP1, or EP3.

The TR interrupt flag is set if the FIFO for the target EP has no data when the IN token is sent

from the USB host. However, at the timing shown in figure 14.30, multiple TR interrupts occur

successively. Take appropriate measures against malfunction in such a case.

Note:

This module determines whether to return NAK if the FIFO of the target EP has no data

when receiving the IN token, but the TR interrupt flag is set only after a NAK handshake

is sent. If the next IN token is sent before PKTE of UTRG0 is written to, the TR interrupt

flag is set again.

CPU

Host

IN token

Sets TR flag

(Sets the flag again)

Sets TR flag

Determines whether

to return NAK

Transmits data

TR interrupt routine

Clear

TR flag

Writes

transmit data

UTRG0/

PKTE

TR interrupt routine

USB

NAK

Determines whether

to return NAK

NAK

ACK

Figure 14.30 TR Interrupt Flag Set Timing

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