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H8S/2218 Scheda tecnica(PDF) 626 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 626 Page - Renesas Technology Corp |
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626 / 750 page ![]() Section 17 Flash Memory (F-ZTAT Version) Rev.6.00 Jun. 03, 2008 Page 578 of 698 REJ09B0074-0600 An example in which flash memory block area EB0 is overlapped is shown in figure 17.11. 1. The RAM area to be overlapped is fixed at a 1-kbyte area in the range of H'FFD000 to H'FFD3FF. 2. The flash memory area to overlap is selected by RAMER from a 1-kbyte area among one of the EB0 to EB3 blocks. 3. The overlapped RAM area can be accessed from both the flash memory addresses and RAM addresses. 4. When the RAMS bit in RAMER is set to 1, program/erase protection is enabled for all flash memory blocks (emulation protection). In this state, setting the P1 or E1 bit in FLMCR1 to 1 does not cause a transition to program mode or erase mode. 5. A RAM area cannot be erased by execution of software in accordance with the erase algorithm. 6. Block area EB0 contains the vector table. When performing RAM emulation, the vector table is needed in the overlap RAM. (EB0) (EB2) (EB1) (EB0) (EB2) Flash memory Flash memory On-chip RAM (1-kbyte shadow) On-chip RAM (4 kbytes) On-chip RAM (1 kbyte) On-chip RAM (7 kbytes - 64 bytes) On-chip RAM (64 bytes) On-chip RAM (4 kbytes) On-chip RAM (1 kbyte) On-chip RAM (7 kbytes - 64 bytes) On-chip RAM (64 bytes) Flash memory Normal memory map RAM overlap memory map H'000000 H'000400 H'000800 H'000C00 H'FFD000 H'FFFFFF H'FFFFC0 H'FFD400 H'FFEFBF H'FFD3FF H'FFC000 Figure 17.11 Example of RAM Overlap Operation |
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