H8SSLASH2218 datasheet(712/750 Pages) RENESAS

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Section 22 Electrical Characteristics

Rev.6.00 Jun. 03, 2008 Page 664 of 698

REJ09B0074-0600

22.4.1

Clock Timing

Table 22.4 lists the clock timing

Table 22.4

Clock Timing

Condition A: VCC = PLL VCC = Dr VCC = 2.4 V to 3.6 V, Vref = 2.4 V to VCC, VSS = PLLVSS =

Dr VSS = 0 V, f = 32.768 kHz, 6 MHz, Ta = –20°C to +75°C (regular specifications),

Ta = –40°C to +85°C (wide-range specifications)

Condition B: VCC = PLL VCC = Dr VCC = 2.7 V to 3.6 V, Vref = 2.7 V to VCC, VSS = PLLVSS =

Dr VSS = 0 V, f = 32.768 kHz, 6 MHz to 16 MHz, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range specifications)

Condition C: VCC = PLL VCC = Dr VCC = 3.0 V to 3.6 V, Vref = 3.0 V to VCC, VSS = PLLVSS =

Dr VSS = 0 V, f = 32.768 kHz, 6 MHz to 24 MHz, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range specifications)

Condition D: VCC = PLL VCC = Dr VCC = 3.0 V to 3.6 V, Vref = 3.0 V to VCC, VSS = PLLVSS =

Dr VSS = 0 V, f = 32.768 kHz, 16 MHz to 24 MHz, Ta = −20°C to +75°C (regular

specifications), Ta = −40°C to +85°C (wide-range specifications)

Condition A Condition B Condition C Condition D

Item

Symbol Min.

Max. Min.

Max. Unit

Test

Conditions

Clock cycle time

tcyc

166.6

62.5

166.6 41.6

62.5

Clock high pulse width tCH

—

Clock low pulse width

tCL

—

Clock rise time

tCr

—

Clock fall time

tCf

—

Oscillation stabilization

time at reset (crystal)

tOSC1

—

Figure 22.4

Oscillation stabilization

time in software

standby (crystal)

tOSC2

—

Figures 20.4,

19.2

CL1 = CL2 =

10 to 22 pF

—

Figures 20.4,

19.2

CL1 = CL2 =

10 to 15 pF

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