H8SSLASH2218 datasheet(732/750 Pages) RENESAS

732 / 750 page

Section 22 Electrical Characteristics

Rev.6.00 Jun. 03, 2008 Page 684 of 698

REJ09B0074-0600

3. Block erase time (Shows the total period for which the E1-bit FLMCR1 is set. It does not

include the erase verification time.)

4. Maximum programming time value

tp (max.) = Wait time after P1 bit set (z) × maximum programming count (N1 + N2)

= (Z0 + Z2)

× 6 + Z1 × 994

5. Maximum erasure time value

tE (max.) = Wait time after E1 bit set (z) × maximum erasure count (N)

6. Minimum times that guarantee all characteristics after programming. (The guaranteed

range is 1 to the minimum value.)

7. Reference value when the temperature is 25°C. (It is reference that reprogramming is

normally enabled up to this value.)

8. Data hold characteristics when reprogramming is performed within the range of

specifications including the minimum value.

22.8

Usage Note

General Notice during Design for Printed Circuit Board: Measures for radiation noise caused

by the transient current in this LSI should be taken into consideration. The examples of the

measures are shown below.

• To use a multilayer printed circuit board which includes layers for Vcc and GND.

• To mount by-pass capacitors (approximately 0.1 μF) between the Vcc and GND (Vss) pins,

and the PLLVcc and PLLGND pins, of this LSI.

Characteristics of F-ZTAT and Masked ROM Versions: Though the F-ZTAT version and the

masked ROM version satisfy electrical characteristics described in this manual, the actual value of

electrical characteristics, operating margin, and noise margin may differ due to the differences of

production process, on-chip ROM, and layout patterning.

When the system has been evaluated with the F-ZTAT version, the equivalent evaluation should

be implemented to the masked ROM version when shifted to the masked ROM version.

H8S/2218 Scheda tecnica(PDF) 732 Page - Renesas Technology Corp