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H8S/2218 Scheda tecnica(PDF) 273 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 273 Page - Renesas Technology Corp |
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273 / 750 page ![]() Section 8 I/O Ports Rev.6.00 Jun. 03, 2008 Page 225 of 698 REJ09B0074-0600 8.2.4 Port 3 Open-Drain Control Register (P3ODR) P3ODR controls the PMOS on/off state for each port 3 pin. Bit Bit Name Initial Value R/W Description 7 ⎯ Undefined ⎯ Reserved This bit is undefined and cannot be modified. 6 P36ODR 0 R/W Setting a P3ODR bit to 1 makes the corresponding port 3 pin an NMOS open-drain output pin, while clearing the bit to 0 makes the pin a CMOS output pin. 5 to 3 ⎯ Undefined ⎯ Reserved These bits are undefined and cannot be modified. 2 1 0 P32ODR P31ODR P30ODR 0 0 0 R/W R/W R/W Setting a P3ODR bit to 1 makes the corresponding port 3 pin an NMOS open-drain output pin, while clearing the bit to 0 makes the pin a CMOS output pin. 8.2.5 Pin Functions Port 3 pins also function as SCI I/O pins and external interrupt input ( IRQ4) pins. The correspondence between the register specification and the pin functions is shown below. The P36 pin must be used as the D+ pull-up control output pin of the USB. For details, refer to section 14, Universal Serial Bus (USB). Table 8.19 P36 Pin Function P36DDR 0 1 Pin Function P36 input pin P36 output pin (D+ pull-up control output pin of USB) |
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