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H8S/2218 Scheda tecnica(PDF) 278 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 278 Page - Renesas Technology Corp |
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278 / 750 page ![]() Section 8 I/O Ports Rev.6.00 Jun. 03, 2008 Page 230 of 698 REJ09B0074-0600 8.4.3 Port 7 Register (PORT7) PORT7 indicates the pin states of the port 7. Bit Bit Name Initial Value R/W Description 7 6 5 P77 P76 P75 ⎯* ⎯* ⎯* ⎯ ⎯ ⎯ (H8S/2218 Group) Reserved These bits are undefined and cannot be modified. (H8S/2212 Group) If P7DDR bits are set to 1, the P7DR value is read. If P7DDR bits are cleared to 0, the pin states are read. 4 P74 ⎯* R (H8S/2218 Group) If the port 7 is read while P7DDR bits are set to 1, the P7DR value is read. If the port 7 is read while P7DDR bits are cleared to 0, the pin states are read. (H8S/2212 Group) Reserved This bit is undefined and cannot be modified. 3, 2 ⎯ Undefined ⎯ Reserved These bits are undefined and cannot be modified. 1 0 P71 P70 ⎯* ⎯* R R (H8S/2218 Group) If the port 7 is read while P7DDR bits are set to 1, the P7DR value is read. If the port 7 is read while P7DDR bits are cleared to 0, the pin states are read. (H8S/2212 Group) Reserved These bits are undefined and cannot be modified. Note: * Determined by the states of pins P77 to P74, P71, and P70. |
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