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APPENDIX

7733 Group User’s Manual

21-31

Appendix 3. Control registers

Memory allocation control register

ROM size

7 to 5

Not implemented.

Notes 1: The case where value “55 16” is written in of the procedure listed below is not included.

2: When changing these bits, this change must be performed in an area which is internal

ROM area before and after this change, for example addresses 00C000 16 to 00FFFF16.

Also, when changing these bits, be sure to follow the procedure listed below.

3: This figure is applied only to the M37733MHBXXXFP. For the other microcoputers,

please refer to the latest datasheets on the English document CD-ROM or our Web site.

Bit

Bit name

Functions

At reset

Memory allocation selection bits

(Notes 1 and 2)

0 0 0: 124 Kbytes,

3968 bytes

0 0 1: 120 Kbytes,

3968 bytes

0 1 0: 60 Kbytes,

2048 bytes

0 1 1: Do not select.

1 0 0: 32 Kbytes,

2048 bytes

1 0 1: 16 Kbytes,

2048 bytes

1 1 0: 96 Kbytes,

3968 bytes

1 1 1: Do not select.

b2b1b0

Memory allocation control register (address 63 16) (Note 3)

Un-

defined

Note: When changing bits 2 to 0, be sure

to follow this procedure.

Procedure

By using the LDM instruction, write value “55 16” to address 6316.

(By this, writing to the memory allocation selection bits is enabled.)

By using the LDM instruction, write value “00000XXX 2” to

address 6316.

(Values of b2, b1, and b0 shown in the above Figure)

Writing is performed

by the next instruction.

Must be fixed to “0.” (Note 1)

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