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CENTRAL PROCESSING UNIT (CPU)

7733 Group User’s Manual

2–25

2.5.1 Single-chip mode

When not using an external device, this mode is used. In this mode, ports P0 to P8 function as programmable

I/O ports. (When using internal peripheral devices, they function as I/O pins.) Only the internal area (SFR,

internal RAM, and internal ROM) can be accessed.

Output of E can be stopped by software. (Refer to section “12.1 Signals required for accessing external

devices.”)

2.5.2 Memory expansion and Microprocessor modes

When connecting an external device, these modes are used. In these modes, an external device can be

connected to an arbitrary area in the 16-Mbyte accessible area. For access to an external device, refer to

chapter “12. CONNECTING EXTERNAL DEVICES.”

The memory expansion and microprocessor modes have the same functions except for the followings:

In the microprocessor mode, access to the internal ROM area is forcibly disabled. This area is handled

as the external area.

In the microprocessor mode, port P42 functions as a clock

φ1 output pin. (Note)

In the memory expansion and microprocessor modes, pins P0 to P3, P40, and P41 function as I/O pins for

signals required for access to an external device. Therefore, these pins cannot be used as programmable

I/O ports.

If an external device is connected to a certain area which is allocated to the internal area, when this area

is read, data in the internal area is fetched into the central processing unit (BIU) but data in the external

area is not fetched; when data is written to this area, the data is written to the internal area and signals

are output to the external at the same timing as writing to the internal area.

Note: Output of clock

φ1 can be stopped by software. (For details, refer to section “12.1 Signals required

for accessing external devices.”)

Figure 2.5.2 shows the pin configuration in each processor mode. Table 2.5.1 lists the relationship between

processor modes and functions of P0 to P4.

For each pin’s function, refer to section “1.3 Pin description,” chapters “3. PROGRAMMABLE I/O PORTS”

to “9. A-D CONVERTER” and “12. CONNECTING EXTERNAL DEVICES.”

2.5 Processor modes

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