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7733 Scheda tecnica(PDF) 83 Page - Renesas Technology Corp |
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7733 Scheda tecnica(HTML) 83 Page - Renesas Technology Corp |
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83 / 940 page ![]() 7733 Group User's Manual INTERRUPTS 4–4 Low-order address 00FFFE16 00FFFC16 00FFFA16 00FFF816 00FFF616 00FFF416 00FFF216 00FFF016 00FFEE16 00FFEC16 00FFEA16 00FFE816 00FFE616 00FFE416 00FFE216 00FFE016 00FFDE16 00FFDC16 00FFDA16 00FFD816 00FFD616 Remarks Non-maskable Non-maskable software interrupt Non-maskable software interrupt Not used usually Non-maskable interrupt External interrupt by signal input from pin INT0 External interrupt by signal input from pin INT1 External interrupt by signal input from pin INT2 or by key input Internal interrupt from Timer A0 Internal interrupt from Timer A1 Internal interrupt from Timer A2 Internal interrupt from Timer A3 Internal interrupt from Timer A4 Internal interrupt from Timer B0 Internal interrupt from Timer B1 Internal interrupt from Timer B2 Internal interrupt from UART0 Internal interrupt from UART1 Internal interrupt from A-D converter or UART2 Interrupt source Reset Zero division BRK instruction ____ DBC (Note 1) Watchdog timer INT0 INT1 INT2/Key input (Note 2) Timer A0 Timer A1 Timer A2 Timer A3 Timer A4 Timer B0 Timer B1 Timer B2 UART0 reception UART0 transmission UART1 reception UART1 transmission A-D/UART2 trans./ /rece. (Note 3) High-order address 00FFFF16 00FFFD16 00FFFB16 00FFF916 00FFF716 00FFF516 00FFF316 00FFF116 00FFEF16 00FFED16 00FFEB16 00FFE916 00FFE716 00FFE516 00FFE316 00FFE116 00FFDF16 00FFDD16 00FFDB16 00FFD916 00FFD716 4.2 Interrupt sources Table 4.2.1 lists interrupt sources and their vector addresses. When programming, set the start address of each interrupt routine to the vector addresses listed below. 4.2 Interrupt sources Interrupt vector addresses Table 4.2.1 Interrupt sources and Interrupt vector addresses Notes 1: This is only for debugger control and is not used usually. 2: When the key input interrupt selection bit (bit 7 at address 6D16) = “1,” the key input interrupt function is selected. For details, refer to chapter “5 KEY INPUT INTERRUPT FUNCTION.” 3: The A-D conversion interrupt and the UART2 transmission/reception interrupt share the same interrupt vector addresses and interrupt control register. By setting the serial I/O mode selection bits (bits 0 to 2 at address 6416), the A-D conversion interrupt or UART2 transmission/reception interrupt is selected. |
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