7733 datasheet(9/940 Pages) RENESAS

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7733 Group User’s Manual

Table of contents

CHAPTER 4. INTERRUPTS

4.1 Overview .................................................................................................................................. 4-2

4.2 Interrupt sources .................................................................................................................... 4-4

4.3 Interrupt control ..................................................................................................................... 4-6

4.3.1 Interrupt disable flag (I) ................................................................................................. 4-8

4.3.2 Interrupt request bit ........................................................................................................ 4-8

4.3.3 Interrupt priority level selection bits and Processor interrupt priority level (IPL) .. 4-8

4.4 Interrupt priority level ......................................................................................................... 4-10

4.5 Interrupt priority level detection circuit ......................................................................... 4-11

4.6 Interrupt priority level detection time ............................................................................. 4-13

4.7 How interrupts are processed (from acceptance of interrupt request until

execution of interrupt routine) ........................................................................................ 4-14

4.7.1 Change in IPL at acceptance of interrupt request ................................................... 4-15

4.7.2 How to push registers .................................................................................................. 4-16

4.8 Return from interrupt routine ............................................................................................ 4-17

4.9 Multiple interrupts ................................................................................................................ 4-17

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4.10 External interrupts (INTi interrupt) ................................................................................. 4-19

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4.10.1 INTi interrupt request bit’s function .......................................................................... 4-21

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4.10.2 How to switch INTi interrupt request occurrence condition ................................... 4-22

4.11 Precautions for interrupts ................................................................................................ 4-23

CHAPTER 5. KEY INPUT INTERRUPT FUNCTION

5.1 Overview .................................................................................................................................. 5-2

5.2 Block description ................................................................................................................... 5-3

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5.2.1 Pins KI0 to KI3 and P64/INT2 ................................................................................................................................ 5-3

5.2.2 Port function control register ......................................................................................... 5-4

5.2.3 Interrupt function ............................................................................................................. 5-6

5.3 Initial setting example for related registers ....................................................................5-7

CHAPTER 6. TIMER A

6.1 Overview .................................................................................................................................. 6-2

6.2 Block description ................................................................................................................... 6-3

6.2.1 Counter and reload register (Timer Ai register) ........................................................ 6-4

6.2.2 Count start flag ............................................................................................................... 6-5

6.2.3 Timer Ai mode register .................................................................................................. 6-6

6.2.4 Timer Ai interrupt control register ................................................................................ 6-7

6.2.5 Port P5 and port P6 direction registers ...................................................................... 6-8

6.3 Timer mode (Bits 1 and 0 of timer Ai mode register = “002”) .................................. 6-9

6.3.1 Setting for timer mode ................................................................................................. 6-11

6.3.2 Count source ................................................................................................................. 6-13

6.3.3 Operation in timer mode .............................................................................................. 6-14

6.3.4 Selectable functions ..................................................................................................... 6-15

6.4 Event counter mode (Bits 1 and 0 of timer Ai mode register = “012”) ................. 6-19

6.4.1 Setting for event counter mode .................................................................................. 6-23

6.4.2 Operation in event counter mode ............................................................................... 6-25

6.4.3 Selectable functions ..................................................................................................... 6-27

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