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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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7733 Scheda tecnica(PDF) 620 Page - Renesas Technology Corp |
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7733 Scheda tecnica(HTML) 620 Page - Renesas Technology Corp |
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620 / 940 page  7733 Group User’s Manual 21-72 APPENDIX Interrupt Q (1/2) If an interrupt request (b) occurs while an interrupt routin e (a) is executed, is it true that the main routine is not executed at all from when the execution of th e interrupt routine (a) is completed until the execution of the INTACK sequence for the next interrupt (b) starts? Conditions: q I = 0 by executing the RTI instruction q Interrupt priority level of interrupt (b) is higher than IPL of main routine. q Interrupt priority level detection time = 2 cycles of φ A An interrupt request is sampled by detecting a sampling puls e which is generated synchronously with the CPU’s op-code fetch cycle. (1) If the next interrupt request (b) occurs before sampling pul se of the RTI instruction is generated, sampling for this interrupt request is completed while the RTI instruction is executed. Therefore, the INTACK sequence for (b) is executed without executing the main routine. (Even one instruction is not executed.) Interrupt routine (a) Main routine INTACK sequence (b) Sequence of execut ion ? RTI instruction INTACK sequence for (b) Interrupt request (b) Interrupt routine (a) Sampling pulse RTI instruction Appendix 9. Q & A |
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