7733 datasheet(810/940 Pages) RENESAS

810 / 940 page

OVERVIEW

7736 Group User’s Manual

1–6

––

I/O port P3

I/O

Output

Same as the 7733 Group.

__ ____

These pins respectively output signals R/W, BHE,

_____

ALE, and HLDA.

q Signal R/W

This signal indicates the data bus state.

When this signal level is “H,” a data bus is

in the read state.

When this signal level is “L,” a data bus is

in the write state.

____

q Signal BHE

This signal’s level is “L” when the microcomputer

accesses an odd address.

q Signal ALE

This signal is used to separate the multiplexed

signal which consists of an address and data

to the address and the data.

_____

q Signal HLDA

This signal informs the external whether this

microcomputer enters the Hold state or not.

_____

In Hold state, pin HLDA outputs “L” level.

________

____

These pins respectively output signals WEL, WEH,

_____

ALE, and HLDA.

________

_________

q Signal WEL, WEH

____

Signal WEL is the write enable low signal.

____

Signal WEH is the write enable high signal.

These signals’ levels are “L” in the data write

period of the write cycle.

The operations of these signals depend on

the level of pin BYTE. (Refer to Table 12.1.1

in part 2.)

q Signal ALE

This signal is the same as that in external

bus mode A.

_____

q Signal HLDA

This signal is the same as that in external

bus mode A.

Table 1.3.3 Pin description (3)

Functions

I/O

Name

Processor

mode

Single-chip mode

Memory expansion

or Microprocessor

mode

External

bus mode

P30–P33

R/W,

____

BHE,

ALE,

_____

HLDA

____

WEL,

____

WEH,

ALE,

_____

HLDA

1.3 Pin description

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