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7733 Scheda tecnica(PDF) 274 Page - Renesas Technology Corp |
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7733 Scheda tecnica(HTML) 274 Page - Renesas Technology Corp |
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274 / 940 page ![]() A-D CONVERTER 7733 Group User’s Manual 9–9 (1) Interrupt priority level selection bits (bits 2 to 0) These bits select an A-D conversion interrupt’s priority level. When using A-D conversion interrupts, select one priority level from levels 1 to 7. If an A-D conversion interrupt request occurs, its priority level is compared with the processor interrupt priority level (IPL), and the requested interrupt is enabled only when its priority level is higher than the IPL. (Note that this is applied to the case where the interrupt disable flag (I) = “0.”) When disabling A-D conversion interrupts, set these bits to “0002” (Level 0). (2) Interrupt request bit (bit 3) This bit is set to “1” when an A-D conversion interrupt request occurs. This bit is automatically cleared to “0” when the A-D conversion interrupt request is accepted. Note that this bit can be set to “1” or cleared to “0” by software. 9.2 Block description |
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