ATtiny13A datasheet(37/174 Pages) ATMEL

37 / 174 page

8126D–AVR–11/09

ATtiny13A

8.2.2

External Reset

An External Reset is generated by a low level on the RESET pin if enabled. Reset pulses longer

than the minimum pulse width (See “System and Reset Characteristics” on page 120.) will gen-

erate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a

reset. When the applied signal reaches the Reset Threshold Voltage – VRST – on its positive

edge, the delay counter starts the MCU after the Time-out period – tTOUT – has expired.

Figure 8-4.

External Reset During Operation

8.2.3

Brown-out Detection

ATtiny13A has an On-chip Brown-out Detection (BOD) circuit for monitoring the VCC level during

operation by comparing it to a fixed trigger level. The trigger level for the BOD can be selected

by the BODLEVEL fuses. The trigger level has a hysteresis to ensure spike free Brown-out

Detection. The hysteresis on the detection level should be interpreted as VBOT+ = VBOT + VHYST/2

and VBOT- = VBOT - VHYST/2.

When the BOD is enabled, and VCC decreases to a value below the trigger level (VBOT- in Figure

8-5 on page 37), the Brown-out Reset is immediately activated. When VCC increases above the

trigger level (VBOT+ in Figure 8-5 on page 37), the delay counter starts the MCU after the Time-

out period tTOUT has expired.

The BOD circuit will only detect a drop in VCC if the voltage stays below the trigger level for lon-

ger than tBOD given in “System and Reset Characteristics” on page 120.

Figure 8-5.

Brown-out Reset During Operation

VCC

RESET

TIME-OUT

INTERNAL

RESET

VBOT-

VBOT+

tTOUT

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