ATtiny13A datasheet(54/174 Pages) ATMEL

54 / 174 page

8126D–AVR–11/09

ATtiny13A

If a logic high level (“one”) is present on an asynchronous external interrupt pin configured as

“Interrupt on Rising Edge, Falling Edge, or Any Logic Change on Pin” while the external interrupt

is not enabled, the corresponding External Interrupt Flag will be set when resuming from the

above mentioned Sleep mode, as the clamping in these sleep mode produces the requested

logic change.

10.2.6

Unconnected Pins

If some pins are unused, it is recommended to ensure that these pins have a defined level. Even

though most of the digital inputs are disabled in the deep sleep modes as described above, float-

ing inputs should be avoided to reduce current consumption in all other modes where the digital

inputs are enabled (Reset, Active mode and Idle mode).

The simplest method to ensure a defined level of an unused pin, is to enable the internal pull-up.

In this case, the pull-up will be disabled during reset. If low power consumption during reset is

important, it is recommended to use an external pull-up or pull-down. Connecting unused pins

directly to VCC or GND is not recommended, since this may cause excessive currents if the pin is

accidentally configured as an output.

10.3 Alternate Port Functions

Most port pins have alternate functions in addition to being general digital I/Os. Figure 10-5

shows how port pin control signals from the simplified Figure 10-2 on page 50 can be overridden

by alternate functions.

Figure 10-5. Alternate Port Functions

Note:

WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clkI/O, SLEEP,

and PUD are common to all ports. All other signals are unique for each pin.

clk

RPx

RRx

WRx

RDx

WDx

PUD

SYNCHRONIZER

WDx:

WRITE DDRx

WRx:

WRITE PORTx

RRx:

READ PORTx REGISTER

RPx:

READ PORTx PIN

PUD:

PULLUP DISABLE

clk

I/O:

I/O CLOCK

RDx:

READ DDRx

SET

CLR

DIxn

AIOxn

DIEOExn

PVOVxn

PVOExn

DDOVxn

DDOExn

PUOExn

PUOVxn

PUOExn:

Pxn PULL-UP OVERRIDE ENABLE

PUOVxn:

Pxn PULL-UP OVERRIDE VALUE

DDOExn:

Pxn DATA DIRECTION OVERRIDE ENABLE

DDOVxn:

Pxn DATA DIRECTION OVERRIDE VALUE

PVOExn:

Pxn PORT VALUE OVERRIDE ENABLE

PVOVxn:

Pxn PORT VALUE OVERRIDE VALUE

DIxn:

DIGITAL INPUT PIN n ON PORTx

AIOxn:

ANALOG INPUT/OUTPUT PIN n ON PORTx

RESET

CLR

PINxn

PORTxn

DDxn

DIEOVxn

SLEEP

DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE

DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE

SLEEP:

SLEEP CONTROL

Pxn

I/O

PTOExn

PTOExn:

Pxn, PORT TOGGLE OVERRIDE ENABLE

WPx:

WRITE PINx

WPx

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