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AM1808AZCED3 Scheda tecnica(PDF) 103 Page - Texas Instruments

Il numero della parte AM1808AZCED3
Spiegazioni elettronici  AM1808 ARM Microprocessor
PDF  264 Pages
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AM1808AZCED3 Scheda tecnica(HTML) 103 Page - Texas Instruments

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SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-22. Switching Characteristics for EMIFA Asynchronous Memory Interface (1) (2) (3) (continued)
1.3V, 1.2V, 1.1V, 1.0V
NO
PARAMETER
UNIT
.
MIN
Nom
MAX
EMA_OE active low width (EW = 0)
(RST)*E-3
(RST)*E
(RST)*E+3
ns
10
tw(EMOEL)
(RST+(EWC*16))
(RST+(EWC*16))
EMA_OE active low width (EW = 1)
(RST+(EWC*16))*E
ns
*E-3
*E+3
td(EMWAITH-
Delay time from EMA_WAIT deasserted to
11
3E-3
4E
4E+3
ns
EMOEH)
EMA_OE high
WRITES
(WS+WST+WH)*
(WS+WST+WH)*
EMIF write cycle time (EW = 0)
(WS+WST+WH)*E
ns
E-3
E+3
15
tc(EMWCYCLE)
(WS+WST+WH+(
(WS+WST+WH+(E (WS+WST+WH+(
EMIF write cycle time (EW = 1)
ns
EWC*16))*E - 3
WC*16))*E
EWC*16))*E + 3
Output setup time, EMA_CE[5:2] low to
(WS)*E - 3
(WS)*E
(WS)*E + 3
ns
EMA_WE low (SS = 0)
16
tsu(EMCEL-EMWEL)
Output setup time, EMA_CE[5:2] low to
-3
0
+3
ns
EMA_WE low (SS = 1)
Output hold time, EMA_WE high to
(WH)*E-3
(WH)*E
(WH)*E+3
ns
EMA_CE[5:2] high (SS = 0)
17
th(EMWEH-EMCEH)
Output hold time, EMA_WE high to
-3
0
+3
ns
EMA_CE[5:2] high (SS = 1)
tsu(EMDQMV-
Output setup time, EMA_BA[1:0] valid to
18
(WS)*E-3
(WS)*E
(WS)*E+3
ns
EMWEL)
EMA_WE low
th(EMWEH-
Output hold time, EMA_WE high to
19
(WH)*E-3
(WH)*E
(WH)*E+3
ns
EMDQMIV)
EMA_BA[1:0] invalid
Output setup time, EMA_BA[1:0] valid to
20
tsu(EMBAV-EMWEL)
(WS)*E-3
(WS)*E
(WS)*E+3
ns
EMA_WE low
Output hold time, EMA_WE high to
21
th(EMWEH-EMBAIV)
(WH)*E-3
(WH)*E
(WH)*E+3
ns
EMA_BA[1:0] invalid
Output setup time, EMA_A[13:0] valid to
22
tsu(EMAV-EMWEL)
(WS)*E-3
(WS)*E
(WS)*E+3
ns
EMA_WE low
Output hold time, EMA_WE high to
23
th(EMWEH-EMAIV)
(WH)*E-3
(WH)*E
(WH)*E+3
ns
EMA_A[13:0] invalid
EMA_WE active low width (EW = 0)
(WST)*E-3
(WST)*E
(WST)*E+3
ns
24
tw(EMWEL)
(WST+(EWC*16))
(WST+(EWC*16))
EMA_WE active low width (EW = 1)
(WST+(EWC*16))*E
ns
*E-3
*E+3
td(EMWAITH-
Delay time from EMA_WAIT deasserted to
25
3E-3
4E
4E+3
ns
EMWEH)
EMA_WE high
Output setup time, EMA_D[15:0] valid to
26
tsu(EMDV-EMWEL)
(WS)*E-3
(WS)*E
(WS)*E+3
ns
EMA_WE low
Output hold time, EMA_WE high to
27
th(EMWEH-EMDIV)
(WH)*E-3
(WH)*E
(WH)*E+3
ns
EMA_D[15:0] invalid
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
103
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