AD1843JS datasheet(31/64 Pages) AD

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AD1843

REV. 0

–31–

res

Reserved for future expansion. To ensure future compatibility, write “0” to all reserved bits.

Initial default state after reset: 1000 1000 1000 1000 (8888 hex). Cleared to default and cannot be written

to when: the RESET pin is asserted LO; when the PWRDWN pin is asserted LO; when the PDNO bit in

Control Register Address 0 is set to “1” (all conversions disabled); or when the AAMEN bit (analog input to

analog mix disabled), or the ANAEN bit (analog channels powered down) in Control Register Address 27 is

reset to “0.”

Address 5

Mix Control—Auxiliary 2 to Mixer

Data 15

Data 14

Data 13

Data 12

Data 11

Data 10

Data 9

Data 8

LX2MM

res

LX2M4

LX2M3

LX2M2

LX2M1

LX2M0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

RX2MM

res

RX2M4

RX2M3

RX2M2

RX2M1

RX2M0

LX2MM

Left Auxiliary 2 Mix Mute

0 = Mix Enabled

1 = Mix Muted

LX2M4:0

Left Auxiliary 2 Mix Gain/Attenuation Select. Least significant bit represents –1.5 dB. Referred to

2.0 V p-p DAC1 output level.

00000 = +12.0 dB Gain

01000 = 0.0 dB

11111 = –34.5 dB Attenuation

RX2MM

Right Auxiliary 2 Mix Mute

0 = Mix Enabled

1 = Mix Muted

RX2M4:0

Right Auxiliary 2 Mix Gain/Attenuation Select. Least significant bit represents –1.5 dB. Referred to

2.0 V p-p DAC1 output level.

00000 = +12.0 dB Gain

01000 = 0.0 dB

11111 = –34.5 dB Attenuation

res

Reserved for future expansion. To ensure future compatibility, write “0” to all reserved bits.

Initial default state after reset: 1000 1000 1000 1000 (8888 hex). Cleared to default and cannot be written to when:

the RESET pin is asserted LO; when the PWRDWN pin is asserted LO; when the PDNO bit in Control Register Ad-

dress 0 is set to “1” (all conversions disabled); or when the AAMEN bit (analog input to analog mix disabled), or the

ANAEN bit (analog channels powered down) in Control Register Address 27 is reset to “0.”

Address 6

Mix Control—Auxiliary 3 to Mixer

Data 15

Data 14

Data 13

Data 12

Data 11

Data 10

Data 9

Data 8

LX3MM

res

LX3M4

LX3M3

LX3M2

LX3M1

LX3M0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

RX3MM

res

RX3M4

RX3M3

RX3M2

RX3M1

RX3M0

LX3MM

Left Auxiliary 3 Mix Mute

0 = Mix Enabled

1 = Mix Muted

LX3M4:0

Left Auxiliary 3 Mix Gain/Attenuation Select. Least significant bit represents –1.5 dB. Referred to

2.0 V p-p DAC1 output level.

00000 = +12.0 dB Gain

01000 = 0.0 dB

11111 = –34.5 dB Attenuation

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