MK50H28DIP datasheet(26/64 Pages) STMICROELECTRONICS

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4.1.2.6 Control and Status Register 5 (CSR5)

CSR5 facilitates control and monitoring of modem controls.

RAP<3:1> = 5

000

BIT

NAME

DESCRIPTION

15:06

Reserved, must be written as zeroes.

XEDGE

Setting this bit causes the TD output to change on the rising edge of TCLK rather than on

the falling edge as indicated in the pin 25 description.

RTSEN

RTS/CTS ENABLE is a READ/WRITE bit used to configure pins 26 and 30. If this bit is

set, pin 26 becomes RTS and pin 30 becomes CTS. RTS is driven low whenever the

MK50H28 has data to transmit and is kept low during transmission. RTS will be

driven high after the closing flag of a signal unit is transmited if either no other frames

are in the FIFO or if the minimum signal unit spacing is higher than 2 (see Mode

high. If RTSEN = 0 then pins 26 and 30 become programmable I/O pins DTR and DSR.

The direction and behavior of DSR and DTR are controlled by the following bits.

DTRD

DTR DIRECTION is a READ/WRITE bit used to control the direction of the DTR/RTS

pin. If DTRD = 0, the DTR/RTS pin becomes an input pin and the DTR bit reflects the

current value of the pin; if DTRD = 1, the DTR/RTS pin is an output pin controlled by the

DTR bit below.

DSRD

DSR DIRECTION is a READ/WRITE bit used to control the direction of the DSR/CTS

pin. If DSRD = 0, the DSR/CTS pin becomes an input pin and the DSR bit reflects the

current value of the pin; if DSRD = 1, the DSR/CTS pin is an output pin controlled by the

DSR bit below.

DTR

DATA TERMINAL READY is used to control or observe the DTR I/O pin depending on

the value of DTRD. If DTRD = 0, this bit becomes READ ONLY and always equals

the current value of the DTR/RTS pin. If DTRD = 1, this bit becomes READ/WRITE

and any value written to this bit appears on the DTR/RTS pin.

DSR

DATA SET READY is used to control or observe the DSR I/O pin depending on the

value of DSRD. If DSRD = 0, this bit becomes READ ONLY and always equals the

current value of the DSR/CTS pin. If DSRD = 1 this bit becomes READ/WRITE and

any value written to this bit appears on the DSR/CTS pin.

MK50H28

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