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MK50H28DIP Scheda tecnica(PDF) 36 Page - STMicroelectronics

Il numero della parte MK50H28DIP
Spiegazioni elettronici  MULTI LOGICAL LINK FRAME RELAY CONTROLLER
PDF  64 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

MK50H28DIP Scheda tecnica(HTML) 36 Page - STMicroelectronics

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4.2.6a Address Lookup Table (ALT)
The ALT can support a maximum of 1024 or 8192 active DLCIs depending upon the setting of the
DLCI1K bit in CSR2. Each channel needs a word (= 2 bytes) in the ALT. (NOTE: The ALT is only used
by the receive process)
1
5
1
4
1
3
0
7
0
8
0
0
1
1
1
2
0
1
0
2
0
3
0
4
0
5
0
0
0
9
0
6
00
Index to Context Table
00
Index to Context Table
DLCI = 0
DLCI = 1
MSB
LSB
DLCI = Max
00
Index to Context Table
00
Index to Context Table
DLCI = 1024
A
C
T
V
E
A
C
T
V
E
A
C
T
V
E
A
C
T
V
E
BIT
NAME
DESCRIPTION
0
ACTIVE
This bit is set by the host if the corresponding DLCI is active. If this bit is not set, the data
received for the DLCI will be ignored by the MK50H28. This bit is only used by the receive
process.
14:13
0
Reserved. Must be written as zeros.
15:03
Index to CT
13-bit index to Context Table.
4.2.6 Address Lookup Table (ALT) Address
1
4
1
3
0
7
0
8
1
0
1
1
1
2
0
1
0
2
0
3
0
4
0
5
0
0
0
9
0
6
IADR + 20
IADR + 22
ALTADR <15:00>
0
ALTADR <23:16>
1
5
RESERVED
BIT
NAME
DESCRIPTION
15:08
0
Reserved, must be written as a zero.
07:00/15:00
ALTADR
ADDRESS LOOKUP TABLE ADDRESS. The ALT Address must begin on a word
boundary.
MK50H28
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