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H8S/2218 Scheda tecnica(PDF) 476 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 476 Page - Renesas Technology Corp |
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476 / 750 page ![]() Section 12 Serial Communication Interface Rev.6.00 Jun. 03, 2008 Page 428 of 698 REJ09B0074-0600 12.7.2 Data Format (Except for Block Transfer Mode) Figure 12.25 shows the transfer data format in Smart Card interface mode. • One frame consists of 8-bit data plus a parity bit in asynchronous mode. • In transmission, a guard time of at least 2 etu (Elementary time unit: the time for transfer of one bit) is left between the end of the parity bit and the start of the next frame. • If a parity error is detected during reception, a low error signal level is output for one etu period, 10.5 etu after the start bit. • If an error signal is sampled during transmission, the same data is retransmitted automatically after a delay of 2 etu or longer. Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp When there is no parity error Transmitting station output Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp When a parity error occurs Transmitting station output DE Receiving station output Start bit Data bits Parity bit Error signal Legend: D S: D0 to D7: Dp: DE: Figure 12.25 Normal Smart Card Interface Data Format Data transfer with other types of IC cards (direct convention and inverse convention) are performed as described in the following. Ds AZ Z A Z Z Z ZA A (Z) (Z) State D0 D1 D2 D3 D4 D5 D6 D7 Dp Figure 12.26 Direct Convention (SDIR = SINV = O/ E = 0) With the direction convention type IC and the above sample start character, the logic 1 level corresponds to state Z and the logic 0 level to state A, and transfer is performed in LSB-first order. The start character data above is H'3B. For the direct convention type, clear the SDIR and SINV |
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