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H8S/2218 Scheda tecnica(PDF) 501 Page - Renesas Technology Corp

Il numero della parte H8S/2218
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2218 Scheda tecnica(HTML) 501 Page - Renesas Technology Corp

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Section 13 Boundary Scan Function
Rev.6.00 Jun. 03, 2008 Page 453 of 698
REJ09B0074-0600
EXTEST: The EXTEST instruction is used to test external circuits when this LSI is installed on
the print circuit board. If this instruction is executed, output pins are used to output test data
(specified by the SAMPLE/PRELOAD instruction) from the boundary scan register to the print
circuit board, and input pins are used to input test results.
SAMPLE/PRELOAD: The SAMPLE/PRELOAD instruction is used to input data from the LSI
internal circuits to the boundary scan register, output data from scan path, and reload the data to
the scan path. While this instruction is executed, input signals are directly input to the LSI and
output signals are also directly output to the external circuits. The LSI system circuit is not
affected by this instruction.
In SAMPLE operation, the boundary scan register latches the snap shot of data transferred from
input pins to internal circuit or data transferred from internal circuit to output pins. The latched
data is read from the scan path. The scan register latches the snap data at the rising edge of the
TCK in Capture-DR state. The scan register latches snap shot without affecting the LSI normal
operation.
In PRELOAD operation, initial value is written from the scan path to the parallel output latch of
the boundary scan register prior to the EXTEST instruction execution. If the EXTEST is executed
without executing this RELOAD operation, undefined values are output from the beginning to the
end (transfer to the output latch) of the EXTEST sequence. (In EXTEST instruction, output
parallel latches are always output to the output pins.)
CLAMP: When the CLAMP instruction is selected output pins output the boundary scan register
value which was specified by the SAMPLE/PRELOAD instruction in advance. While the CLAMP
instruction is selected, the status of boundary scan register is maintained regardless of the TAP
controller state. BYPASS is connected between TDI and TDO, the same operation as BYPASS
instruction can be achieved.
HIGHZ: When the HIGHZ instruction is selected, all outputs enter high-impedance state. While
this instruction is selected, the status of boundary scan register is maintained regardless of the TAP
controller state. BYPASS resistor is connected between TDI and TDO, the same operation as
BYPASS instruction can be achieved.
IDCODE: When the IDCODE instruction is selected, IDCODE register value is output to the
TDO in Shift-DR state of TAP controller. In this case, IDCODE register value is output from the
LSB. During this instruction execution, test circuit does not affect the system circuit. INSTR is
initialized by the IDCODE instruction in Test-Logic-Reset state of TAP controller.
BYPASS: The BYPASS instruction is a standard instruction necessary to operate bypass register.
The BYPASS instruction improves the serial data transfer speed by bypassing the scan path.
During this instruction execution, test circuit does not affect the system circuit.



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