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H8S/2218 Scheda tecnica(PDF) 612 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 612 Page - Renesas Technology Corp |
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612 / 750 page ![]() Section 17 Flash Memory (F-ZTAT Version) Rev.6.00 Jun. 03, 2008 Page 564 of 698 REJ09B0074-0600 17.5.4 Erase Block Register 2 (EBR2) EBR2 specifies the flash memory erase area block. EBR2 is initialized to H'00 when the SWE1 bit in FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1 and EBR2 to be automatically cleared to 0. Note: These registers are reserved on the HD64F2211 and HD64F2211U. Only H'00 should be written to them. Bit Bit Name Initial Value R/W Description 7 to 2 — All 0 R/W Reserved The write value should always be 0. 1 EB9 0 R/W When this bit is set to 1, 32 kbytes of EB9 (H'018000 to H'01FFFF) are to be erased. 0 EB8 0 R/W When this bit is set to 1, 32 kbytes of EB8 (H'010000 to H'017FFF) are to be erased. |
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