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H8S/2218 Scheda tecnica(PDF) 614 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 614 Page - Renesas Technology Corp |
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614 / 750 page ![]() Section 17 Flash Memory (F-ZTAT Version) Rev.6.00 Jun. 03, 2008 Page 566 of 698 REJ09B0074-0600 17.5.6 Serial Control Register X (SCRX) SCRX performs register access control. Bit Bit Name Initial Value R/W Description 7 to 4 — All 0 R/W Reserved The write value should always be 0. 3 FLSHE 0 R/W Flash Memory Control Register Enable: Controls CPU access to the flash memory control registers (FLMCR1, FLMCR2, EBR1, and EBR2). Setting the FLSHE bit to 1 enables read/write access to the flash memory control registers. If FLSHE is cleared to 0, the flash memory control registers are deselected. In this case, the flash memory control register contents are retained. 0: Flash control registers deselected in area H'FFFFA8 to H'FFFFAC 1: Flash control registers selected in area H'FFFFA8 to H'FFFFAC 2 to 0 — All 0 R/W Reserved The write value should always be 0. |
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