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H8S/2218 Scheda tecnica(PDF) 637 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 637 Page - Renesas Technology Corp |
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637 / 750 page ![]() Section 17 Flash Memory (F-ZTAT Version) Rev.6.00 Jun. 03, 2008 Page 589 of 698 REJ09B0074-0600 1. 2. 3. Except when switching modes, the level of the mode pins (MD2 to MD0) must be fixed until power-off by pulling the pins up or down. See section 22.7, Flash Memory Characteristics. Mode programming setup time tMDS (min) = 200 ns. Period during which flash memory access is prohibited (x: Wait time after setting SWE1 bit)* 2 Period during which flash memory can be programmed (Execution of program in flash memory prohibited, and data reads other than verify operations prohibited) Notes: VCC FWE φ tOSC1 min 0 μs min 0 μs tMDS* 3 tMDS* 3 MD2 to MD0* 1 RES SWE1 bit SWE1 set SWE1 cleared x θ Programming/ erasing possible Wait time: Wait time: Figure 17.15 Power-On/Off Timing (Boot Mode) |
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