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H8S/2218 Scheda tecnica(PDF) 669 Page - Renesas Technology Corp

Il numero della parte H8S/2218
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2218 Scheda tecnica(HTML) 669 Page - Renesas Technology Corp

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Section 20 Power-Down Modes
Rev.6.00 Jun. 03, 2008 Page 621 of 698
REJ09B0074-0600
Oscillator
φ
NMI
NMIEG
SSBY
NMI exception
handling
NMIEG = 1
SSBY = 1
Oscillation
stabilization
time t
OSC2
Software standby mode
(power-down mode)
NMI exception
handling
SLEEP instruction
Figure 20.4 Software Standby Mode Application Example
20.5
Hardware Standby Mode
20.5.1
Transition to Hardware Standby Mode
When the
STBY pin is driven low, a transition is made to hardware standby mode from any mode.
In hardware standby mode, all functions enter the reset state and stop operation, resulting in a
significant reduction in power dissipation. As long as the prescribed voltage is supplied, on-chip
RAM data is retained. I/O ports are set to the high-impedance state.
In order to retain on-chip RAM data, the RAME bit in SYSCR should be cleared to 0 before
driving the
STBY pin low.
Do not change the state of the mode pins (MD2 to MD0) while this LSI is in hardware standby
mode.
20.5.2
Clearing Hardware Standby Mode
Hardware standby mode is cleared by means of the
STBY pin and the RES pin. When the STBY
pin is driven high while the
RES pin is low, the reset state is set and clock oscillation is started.
Ensure that the
RES pin is held low until the clock oscillator stabilizes (at least t
osc1—the
oscillation stabilization time—when using a crystal oscillator). When the
RES pin is subsequently
driven high, a transition is made to the program execution state via the reset exception handling
state.



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