H8SSLASH2218 datasheet(120/750 Pages) RENESAS

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Section 3 MCU Operating Modes

Rev.6.00 Jun. 03, 2008 Page 72 of 698

REJ09B0074-0600

3.2

The following registers are related to the operating mode.

• Mode control register (MDCR)

• System control register (SYSCR)

3.2.1

Mode Control Register (MDCR)

MDCR is used to monitor the current operating mode of this LSI. MDCR should not be modified.

Bit

Bit Name

Initial Value R/W

Description

7 to 4

⎯

Undefined

⎯

Reserved

These bits are always read as undefined value and

cannot be modified.

FWE

⎯*1

Flash Programming Enable

Reflects the input level at the FWE pin. This bit

functions same as the FWE bit in the FLMCR1

MDS2

MDS1

MDS0

⎯*1

Mode Select 2 to 0

These bits indicate the input levels at pins MD2 to

MD0 (the current operating mode). Bits MDS2 to

MDS0 correspond to MD2 to MD0. MDS2 to MDS0

are read-only bits and they cannot be written to. The

mode pin (MD2 to MD0) input levels are latched into

these bits when MDCR is read.

These latches are canceled by a power-on reset, but

maintained at manual reset*

Notes: 1. Determined by the FWE and MD2 to MD0 pin settings.

2. Supported only by the H8S/2218 Group.

3.2.2

System Control Register (SYSCR)

SYSCR is used to select the interrupt control mode and the detected edge for NMI, select the

MRES input pin* enable or disable, and enables or disables on-chip RAM.

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