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H8S/2218 Scheda tecnica(PDF) 141 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 141 Page - Renesas Technology Corp |
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141 / 750 page ![]() Section 5 Interrupt Controller Rev.6.00 Jun. 03, 2008 Page 93 of 698 REJ09B0074-0600 5.2 Input/Output Pins Table 5.1 summarizes the pins of the interrupt controller. Table 5.1 Pin Configuration Name I/O Function NMI Input Nonmaskable external interrupt Rising or falling edge can be selected IRQ7 Input IRQ4 Input IRQ3 Input IRQ2 Input Maskable external interrupts Rising, falling, or both edges, or level sensing can be selected ( IRQ6 is an interrupt signal only for the on-chip USB. IRQ5 is an interrupt signal only for the on-chip RTC.) IRQ1 Input IRQ0 Input 5.3 Register Descriptions The interrupt controller has the following registers. For details on the system control register, refer to section 3.2.2, System Control Register (SYSCR). • System control register (SYSCR) • IRQ sense control register H (ISCRH) • IRQ sense control register L (ISCRL) • IRQ enable register (IER) • IRQ status register (ISR) • Interrupt priority register A (IPRA) • Interrupt priority register B (IPRB) • Interrupt priority register C (IPRC) • Interrupt priority register D (IPRD) • Interrupt priority register E (IPRE) • Interrupt priority register F (IPRF) • Interrupt priority register G (IPRG) • Interrupt priority register J (IPRJ) • Interrupt priority register K (IPRK) • Interrupt priority register M (IPRM) |
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