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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S/2218 Scheda tecnica(PDF) 157 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 157 Page - Renesas Technology Corp |
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157 / 750 page  Section 5 Interrupt Controller Rev.6.00 Jun. 03, 2008 Page 109 of 698 REJ09B0074-0600 Table 5.5 Number of States in Interrupt Handling Routine Execution Statuses Object of Access External Device 8-Bit Bus 16-Bit Bus Symbol Internal Memory 2-State Access 3-State Access 2-State Access 3-State Access Instruction fetch SI 1 4 6 + 2m 2 3 + m Branch address read SJ Stack manipulation SK Legend: m: Number of wait states in an external device access. 5.6.5 DMAC Activation by Interrupt The DMAC can be activated by an interrupt. In this case, the following options are available: • Interrupt request to CPU • Activation request to DMAC • Selection of a number of the above For details of interrupt requests that can be used with to activate the DMAC, see section 7, DMA Controller (DMAC). Figure 5.7 shows a block diagram of the interrupt controller of DMAC. |
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