H8SSLASH2218 datasheet(174/750 Pages) RENESAS

174 / 750 page

Section 6 Bus Controller

Rev.6.00 Jun. 03, 2008 Page 126 of 698

REJ09B0074-0600

6.3.6

Pin Function Control Register (PFCR)

PFCR performs address output control in external extended mode. When using the USB with the

emulator (E6000), enable the A8 and A9 output by setting AE3 to AE0 to 0010.

Bit

Bit Name Initial Value R/W

Description

7 to

⎯

Undefined

R/W

Reserved

The write value should always be 0.

AE3

AE2

AE1

AE0

1/0*

R/W

Address Output Enable 3 to 0

These bits select enabling or disabling of address outputs

A8 to A23 in ROMless extended mode and modes with

ROM.

When a pin is enabled for address output, the address is

output regardless of the corresponding DDR setting. When

a pin is disabled for address output, it becomes an output

port when the corresponding DDR bit is set to 1.

0000:

A8 to A23 output disabled (initial value of mode 6 and 7)

0001:

A8 output enabled; A9 to A23 output disabled

0010:

A8, A9 output enabled; A10 to A23 output disabled

0011:

A8 to A10 output enabled; A11 to A23 output disabled

0100:

A8 to A11 output enabled; A12 to A23 output disabled

0101:

A8 to A12 output enabled; A13 to A23 output disabled

0110:

A8 to A13 output enabled; A14 to A23 output disabled

0111:

A8 to A14 output enabled; A15 to A23 output disabled

1000:

A8 to A15 output enabled; A16 to A23 output disabled

1001:

A8 to A16 output enabled; A17 to A23 output disabled

1010:

A8 to A17 output enabled; A18 to A23 output disabled

1011:

A8 to A18 output enabled; A19 to A23 output disabled

1100:

A8 to A19 output enabled; A20 to A23 output disabled

1101:

A8 to A20 output enabled; A21 to A23 output disabled

(initial value of modes 4 and 5)

1110:

A8 to A21 output enabled; A22, A23 output disabled

1111:

A8 to A23 output enabled

Note: * In modes 4 and 5, initial value of each bit is 1. In modes 6 and 7, initial value of each bit is 0.

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