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H8S/2218 Scheda tecnica(PDF) 259 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 259 Page - Renesas Technology Corp |
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259 / 750 page ![]() Section 8 I/O Ports Rev.6.00 Jun. 03, 2008 Page 211 of 698 REJ09B0074-0600 Section 8 I/O Ports Table 8.1 and table 8.2 summarize the port functions of the H8S/2218 Group and H8S/2212 Group respectively. The pins of each port also have other functions such as input/output or external interrupt input pins of on-chip peripheral modules. Each I/O port includes a data direction register (DDR) that controls input/output, a data register (DR) that stores output data, and a port register (PORT) used to read the pin states. The input-only ports do not have DR and DDR. Ports A to E have an on-chip input pull-up MOS and a input pull-up MOS control register (PCR) to control the on/off state of the input pull-up MOS. Ports 3 and A include an open-drain control register (ODR) that controls the on/off state of the output buffer PMOS. All the I/O ports can drive a single TTL load and 30-pF capacitive load. Table 8.1 Port Functions of H8S/2218 Group Port Description Modes 4 and 5 Mode 6 Mode 7 Input/Output Type P17/TIOCB2/TCLKD P16/TIOCA2/ IRQ1 P15/TIOCB1/TCLKC P14/TIOCA1/ IRQ0 P13/TIOCD0/TCLKB/A23 P13/TIOCD0/TCLKB P12/TIOCC0/TCLKA/A22 P12/TIOCC0/TCLKA P11/TIOCB0/A21 P11/TIOCB0 Port 1 General I/O port also functioning as TPU I/O pins, interrupt input pins, and address bus output pins P10/TIOCA0/A20 P10/TIOCA0 Schmitt trigger input ( IRQ1, IRQ0) Port 3 General I/O port also functioning as SCI_0 I/O pins and interrupt input pins P36 P32/SCK0/ IRQ4 P31/RxD0 P30/TxD0 Open-drain output Schmitt trigger input ( IRQ4) Port 4 General input port also functioning as A/D converter analog input pins P43/AN3 P42/AN2 P41/AN1 P40/AN0 Port 7 General I/O port also functioning as bus control output pins and manual reset input pins P74/ MRES P71/ CS5 P70/ CS4 P74/ MRES P71 P70 |
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